Developed a Python wrapper script for JoSIM (superconductive SPICE simulator) to support named subcircuit parameters (similar to HSPICE);
Developed a C++17 module for computing the superconductive logic gate library optimized for area and delay. Parallelized the script to run on 48-core computing cluster;
Developed the tool for logic synthesis and retiming of multiphase logic networks. Integrated the mockturtle logic synthesis library (C++17) with Google OR-tools (Python 3).
Intern (Design Automation)
May 2020 - August 2020
Qualcomm Inc.
(Remote) Rochester, New York, USA
Developed Python tool for automated PCB-level power delivery network layout synthesis;
Reverse-engineered an undocumented layout description format to automatically generate PCB layouts;
Enabled fast PCB prototype generation and comprehensive early power delivery exploration.
Intern (Power Integrity)
May 2018 - August 2018
Qualcomm Inc.
San Diego, California, USA
Developed software to optimize power delivery network parameters based on target power-performance-area specifications;
Seamlessly integrated MATLAB with HSPICE;
Efficient early design space exploration for power delivery in high-performance integrated circuits.
Research Assistant
June 2017 - June 2022
University of Rochester
Rochester, New York, USA
Developed EDA methodologies and software for VLSI power delivery network design, early system-level exploration, and layout synthesis (funded by Qualcomm);
Developed algorithms and software for clock distribution network synthesis for superconductive Rapid Single Flux Quantum integrated circuits (funded by Synopsys);
Developed Infinity Mirror Technique for fast and accurate analysis of voltage drop within large grids (funded by National Science Foundation).
Teaching Assistant
Fall 2017 - Fall 2022
University of Rochester
Rochester, New York, USA
Graduate-level course ECE461 "Introduction to VLSI";
Using Cadence Virtuoso, taught undergraduate and graduate students design and analysis of analog and digital circuits, layout design, design rule checking, and layout-versus-schematic;
Developed, distributed, and graded the homework, laboratory, and examination assignments.
Undergraduate Research Assistant
November 2014 - May 2016
Nazarbayev University
Astana, Kazakhstan
Developed MATLAB tool for minimizing total harmonic distortion (THD) in multilevel voltage converters
rassul.bairamkulov@epfl.ch
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